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Add support of power management for stm32 SAES peripheral #6778
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Commits on Apr 19, 2024
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drivers: crypto: stm32_saes: add pm to SAES driver
Add power management support to the SAES driver through suspend/resume callbacks. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
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dts: stm32: add SAES dependency on RNG clock for stm32mp13
Adds missing RNG clock resource in SAES and PKA nodes in stm32mp13 SoC DTSI files. Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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drivers: crypto: stm32_saes: SAES depends on RNG clock
Fixes missing dependency of SAES device on RNG clock. Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
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plat-stm32mp1: conf: disable CRYP when SAES is enable on STM32MP13.
override value of CFG_STM32_CRYP to n when CFG_STM32_SAES=y. OP-TEE crypto framework can only register one AES accelerator. If CRYP and SAES are probed, OP-TEE will panic. Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
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fixup! plat-stm32mp1: conf: disable CRYP when SAES is enable on STM32…
…MP13. fix typos Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
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fixup! drivers: crypto: stm32_saes: add pm to SAES driver
remove rng clock, introduce in next commit Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
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drivers: crypto: stm32_saes: SAES depends on RNG clock
add rng clock Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
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drivers: stm32_saes: remove probe verification on base address
An assert was used to ensure we only probe one instance of SAES. It can create an error if the probe is deferred. Remove assert as it can create an error and the probe will fail when registering in the crypto framework. Fixes: 4320f5c ("crypto: stm32: SAES cipher support") Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
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