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plat-versal: add support for the Versal Net variant #6738

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plat-versal: add support for the Versal Net variant #6738

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9f1cd1b
plat-versal: add support for Versal Net variant
jcorbier Jun 30, 2023
0b8feb3
drivers: versal: rework mbox driver
jcorbier Oct 20, 2023
e0f5515
drivers: versal: use PLM for generic RNG operations
jcorbier Dec 8, 2023
5f23b2b
drivers: versal: PKI engine driver for Versal Net
jcorbier Oct 25, 2023
5e0d4a9
drivers: versal: use HKDF to derive the HUK
jcorbier Dec 11, 2023
caf9ea9
core: pta: add Versal FPGA PTA
jcorbier Dec 14, 2023
9267cb6
drivers: versal: update to support more recent versions of the PLM
jcorbier Jan 24, 2024
10d334a
drivers: versal: NVM driver for Versal Net
jcorbier Jan 30, 2024
c668e58
drivers: versal: fix RSA driver
jcorbier Feb 14, 2024
d477ff3
fixup! drivers: versal: NVM driver for Versal Net
jcorbier Apr 2, 2024
9dd3ef9
fixup! plat-versal: add support for Versal Net variant
jcorbier Apr 2, 2024
1dd1efa
fixup! core: pta: add Versal FPGA PTA
jcorbier Apr 2, 2024
6d01a34
fixup! drivers: versal: rework mbox driver
jcorbier Apr 2, 2024
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43 changes: 39 additions & 4 deletions core/arch/arm/plat-versal/conf.mk
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,11 @@ CFG_MMAP_REGIONS ?= 24

$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
ifeq ($(PLATFORM_FLAVOR),net)
$(call force,CFG_TEE_CORE_NB_CORE,16)
else
$(call force,CFG_TEE_CORE_NB_CORE,2)
endif
$(call force,CFG_ARM_GICV3,y)
$(call force,CFG_PL011,y)
$(call force,CFG_GIC,y)
Expand All @@ -23,17 +27,31 @@ CFG_CORE_DYN_SHM ?= y
CFG_WITH_STATS ?= y
CFG_ARM64_core ?= y

# Default Versal NET memory allocation
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Would be better to have the inline comment inside the config block:

 ifeq ($(PLATFORM_FLAVOR),net)
+# Default Versal NET memory allocation
 ...
 else
+# Default Versal memory allocation
 ...
 endif

or alternatively:

+# Default memory allocation
 ifeq ($(PLATFORM_FLAVOR),net)
 ...
 else
 ...
 endif

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Should be addressed by fixup commit 9dd3ef9

ifeq ($(PLATFORM_FLAVOR),net)
CFG_TZDRAM_START ?= 0x22200000
CFG_TZDRAM_SIZE ?= 0x2700000
CFG_SHMEM_START ?= 0x24900000
CFG_SHMEM_SIZE ?= 0x1800000

# Default Versal memory allocation
else
CFG_TZDRAM_START ?= 0x60000000
CFG_TZDRAM_SIZE ?= 0x10000000
CFG_SHMEM_START ?= 0x70000000
CFG_SHMEM_SIZE ?= 0x10000000
endif

ifeq ($(CFG_ARM64_core),y)
$(call force,CFG_CORE_ARM64_PA_BITS,43)
else
$(call force,CFG_ARM32_core,y)
endif

CFG_RPMB_FS ?= n
CFG_RPMB_TESTKEY ?= y
CFG_RPMB_WRITE_KEY ?=y
Comment on lines +50 to +52
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Intentionally appling these default configs to all Versal flavors?
Same question for CFG_VERSAL_MBOX_IPI_ID ?= 1 and CFG_VERSAL_FPGA_LOADER_PTA ?= y.

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Should be addressed by fixup commit 9dd3ef9


# GPIO
CFG_VERSAL_GPIO ?= y

Expand All @@ -44,11 +62,19 @@ CFG_VERSAL_TRACE_PLM ?= n
$(call force, CFG_VERSAL_MBOX,y)

# MBOX configuration
CFG_VERSAL_MBOX_IPI_ID ?= 3
CFG_VERSAL_MBOX_IPI_ID ?= 1

# PM driver
CFG_VERSAL_PM ?= y

# TRNG driver
$(call force, CFG_VERSAL_RNG_DRV,y)
$(call force, CFG_WITH_SOFTWARE_PRNG,n)

ifeq ($(PLATFORM_FLAVOR),net)
$(call force,CFG_VERSAL_RNG_PLM,y)
endif

# TRNG configuration
CFG_VERSAL_TRNG_SEED_LIFE ?= 3
CFG_VERSAL_TRNG_DF_MUL ?= 2
Expand All @@ -62,18 +88,25 @@ ifeq ($(CFG_VERSAL_CRYPTO_DRIVER),y)
# Disable Fault Mitigation: triggers false positives due to
# the driver's software fallback operations - need further work
CFG_FAULT_MITIGATION ?= n

ifeq ($(PLATFORM_FLAVOR),net)
CFG_VERSAL_PKI_DRIVER ?= y

ifeq ($(CFG_VERSAL_PKI_DRIVER),y)
CFG_VERSAL_PKI_COUNTER_MEASURES ?= n
CFG_VERSAL_PKI_PWCT ?= y
endif
endif
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prefer with a comment : endif # PLATFORM_FLAVOR is net

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Should be addressed by fixup commit 9dd3ef9

endif

# SHA3-384 crypto engine
CFG_VERSAL_SHA3_384 ?= y

# PM driver
CFG_VERSAL_PM ?= y

# Physical Unclonable Function
CFG_VERSAL_PUF ?= y

# Enable Hardware Unique Key driver
CFG_VERSAL_DUMMY_DNA ?= n
CFG_VERSAL_HUK ?= y
# AES-GCM supported key sources for HUK:
# 6 : eFUSE USR 0
Expand All @@ -85,4 +118,6 @@ ifneq ($(CFG_VERSAL_HUK_KEY),$(filter 6 7 11 12,$(firstword $(CFG_VERSAL_HUK_KEY
$(error Invalid value: CFG_VERSAL_HUK_KEY=$(CFG_VERSAL_HUK_KEY))
endif

CFG_VERSAL_FPGA_LOADER_PTA ?= y

CFG_CORE_HEAP_SIZE ?= 262144
2 changes: 1 addition & 1 deletion core/arch/arm/plat-versal/main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -87,7 +87,7 @@ static TEE_Result platform_banner(void)
return TEE_SUCCESS;
}

#if defined(CFG_RPMB_FS)
#if defined(CFG_RPMB_FS) && !defined(CFG_RPMB_TESTKEY)
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I think this change deserves a specific commit.

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Ok, noted.

bool plat_rpmb_key_is_ready(void)
{
vaddr_t plm_rtca = (vaddr_t)phys_to_virt(PLM_RTCA, MEM_AREA_IO_SEC,
Expand Down
33 changes: 31 additions & 2 deletions core/arch/arm/plat-versal/platform_config.h
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Original file line number Diff line number Diff line change
Expand Up @@ -12,11 +12,11 @@
#define CACHELINE_LEN 64
#define STACK_ALIGNMENT CACHELINE_LEN

#if defined(PLATFORM_FLAVOR_generic)

#define PLM_RTCA 0xF2014000
#define PLM_RTCA_LEN 0x1000

#if defined(PLATFORM_FLAVOR_generic)

#define GIC_BASE 0xF9000000
#define UART0_BASE 0xFF000000
#define UART1_BASE 0xFF010000
Expand Down Expand Up @@ -44,6 +44,35 @@
#define GICD_OFFSET 0
#define GICC_OFFSET 0x40000

#elif defined(PLATFORM_FLAVOR_net)

#define GIC_BASE 0xE2000000
#define UART0_BASE 0xF1920000
#define UART1_BASE 0xF1930000

#define IT_UART0 57
#define IT_UART1 58

#define UART0_CLK_IN_HZ 100000000
#define UART1_CLK_IN_HZ 100000000
#define CONSOLE_UART_BASE UART0_BASE
#define IT_CONSOLE_UART IT_UART0
#define CONSOLE_UART_CLK_IN_HZ UART0_CLK_IN_HZ

#define DRAM0_BASE 0
#define DRAM0_SIZE 0x7FF00000

#ifdef ARM64
/* DDR High area base is only available when compiling for 64 bits */
#define DRAM1_BASE 0x800000000
#define DRAM1_SIZE 0x800000000
#define DRAM2_BASE 0xC000000000
#define DRAM2_SIZE 0x4000000000
#endif

#define GICD_OFFSET 0
#define GICC_OFFSET 0x40000

#else
#error "Unknown platform flavor"
#endif
Expand Down
79 changes: 51 additions & 28 deletions core/drivers/crypto/versal/authenc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -343,7 +343,9 @@ static TEE_Result do_init(struct drvcrypt_authenc_init *dinit)
}

/* Write the key */
versal_mbox_alloc(dinit->key.length, dinit->key.data, &key);
ret = versal_mbox_alloc(dinit->key.length, dinit->key.data, &key);
if (ret)
return ret;

arg.data[arg.dlen++] = key_len;
arg.data[arg.dlen++] = engine.key_src;
Expand All @@ -358,8 +360,12 @@ static TEE_Result do_init(struct drvcrypt_authenc_init *dinit)
memset(&arg, 0, sizeof(arg));

/* Send the initialization structure */
versal_mbox_alloc(sizeof(*init), NULL, &init_buf);
versal_mbox_alloc(dinit->nonce.length, dinit->nonce.data, &nonce);
ret = versal_mbox_alloc(sizeof(*init), NULL, &init_buf);
if (ret)
goto out1;
ret = versal_mbox_alloc(dinit->nonce.length, dinit->nonce.data, &nonce);
if (ret)
goto out2;

init = init_buf.buf;
init->iv_addr = virt_to_phys(nonce.buf);
Expand Down Expand Up @@ -400,9 +406,11 @@ static TEE_Result do_init(struct drvcrypt_authenc_init *dinit)

return TEE_SUCCESS;
error:
free(key.buf);
free(init_buf.buf);
free(nonce.buf);
versal_mbox_free(&nonce);
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since versal_mbox_free() NULL's the internal buffer reference, you don't need these numerous branch labels. The below instructions are enough:

error:
	versal_mbox_free(&nonce);
	versal_mbox_free(&init_buf);
	versal_mbox_free(&key);

	return ret;

out2:
versal_mbox_free(&init_buf);
out1:
versal_mbox_free(&key);

return ret;
}
Expand All @@ -427,7 +435,9 @@ static TEE_Result do_update_aad(struct drvcrypt_authenc_update_aad *dupdate)
if (engine.state == FINALIZED)
do_replay();

versal_mbox_alloc(dupdate->aad.length, dupdate->aad.data, &p);
ret = versal_mbox_alloc(dupdate->aad.length, dupdate->aad.data, &p);
if (ret)
return ret;

arg.data[arg.dlen++] = p.len % 16 ? p.alloc_len : p.len;
arg.ibuf[0].mem = p;
Expand Down Expand Up @@ -455,7 +465,7 @@ static TEE_Result do_update_aad(struct drvcrypt_authenc_update_aad *dupdate)

return TEE_SUCCESS;
error:
free(p.buf);
versal_mbox_free(&p);
return ret;
}

Expand All @@ -481,9 +491,15 @@ update_payload(struct drvcrypt_authenc_update_payload *dupdate, bool is_last)
return TEE_ERROR_BAD_PARAMETERS;
}

versal_mbox_alloc(dupdate->src.length, dupdate->src.data, &p);
versal_mbox_alloc(dupdate->dst.length, NULL, &q);
versal_mbox_alloc(sizeof(*input), NULL, &input_cmd);
ret = versal_mbox_alloc(dupdate->src.length, dupdate->src.data, &p);
if (ret)
return ret;
ret = versal_mbox_alloc(dupdate->dst.length, NULL, &q);
if (ret)
goto out1;
ret = versal_mbox_alloc(sizeof(*input), NULL, &input_cmd);
if (ret)
goto out2;

input = input_cmd.buf;
input->input_addr = virt_to_phys(p.buf);
Expand All @@ -505,7 +521,7 @@ update_payload(struct drvcrypt_authenc_update_payload *dupdate, bool is_last)
if (versal_crypto_request(id, &arg, &err)) {
EMSG("AES_UPDATE_PAYLOAD error: %s", versal_aes_error(err));
ret = TEE_ERROR_GENERIC;
goto out;
goto error;
}

if (dupdate->dst.data)
Expand All @@ -515,7 +531,7 @@ update_payload(struct drvcrypt_authenc_update_payload *dupdate, bool is_last)
node = calloc(1, sizeof(*node));
if (!node) {
ret = TEE_ERROR_OUT_OF_MEMORY;
goto out;
goto error;
}

node->is_aad = false;
Expand All @@ -527,10 +543,12 @@ update_payload(struct drvcrypt_authenc_update_payload *dupdate, bool is_last)

return TEE_SUCCESS;
}
out:
free(p.buf);
free(q.buf);
free(input_cmd.buf);
error:
versal_mbox_free(&input_cmd);
out2:
versal_mbox_free(&q);
out1:
versal_mbox_free(&p);

return ret;
}
Expand Down Expand Up @@ -594,7 +612,9 @@ static TEE_Result do_enc_final(struct drvcrypt_authenc_final *dfinal)

memcpy(dfinal->dst.data, last.dst.data, dfinal->dst.length);

versal_mbox_alloc(GCM_TAG_LEN, NULL, &p);
ret = versal_mbox_alloc(GCM_TAG_LEN, NULL, &p);
if (ret)
return ret;

arg.ibuf[0].mem = p;
if (versal_crypto_request(VERSAL_AES_ENCRYPT_FINAL, &arg, &err)) {
Expand All @@ -606,7 +626,7 @@ static TEE_Result do_enc_final(struct drvcrypt_authenc_final *dfinal)
memcpy(dfinal->tag.data, p.buf, GCM_TAG_LEN);
dfinal->tag.length = GCM_TAG_LEN;
out:
free(p.buf);
versal_mbox_free(&p);

if (refcount_val(&engine.refc) > 1)
engine.state = FINALIZED;
Expand Down Expand Up @@ -646,7 +666,10 @@ static TEE_Result do_dec_final(struct drvcrypt_authenc_final *dfinal)
if (ret)
return ret;

versal_mbox_alloc(dfinal->tag.length, dfinal->tag.data, &p);
ret = versal_mbox_alloc(dfinal->tag.length, dfinal->tag.data, &p);
if (ret)
return ret;

arg.ibuf[0].mem = p;

if (versal_crypto_request(VERSAL_AES_DECRYPT_FINAL, &arg, &err)) {
Expand All @@ -659,7 +682,7 @@ static TEE_Result do_dec_final(struct drvcrypt_authenc_final *dfinal)
memcpy(dfinal->tag.data, p.buf, GCM_TAG_LEN);
dfinal->tag.length = GCM_TAG_LEN;
out:
free(p.buf);
versal_mbox_free(&p);

if (refcount_val(&engine.refc) > 1)
engine.state = FINALIZED;
Expand Down Expand Up @@ -687,19 +710,19 @@ static void do_free(void *ctx)
release = true;
refcount_set(&engine.refc, 1);
engine.state = READY;
free(engine.init.init_buf.buf);
free(engine.init.nonce.buf);
free(engine.init.key.buf);
versal_mbox_free(&engine.init.init_buf);
versal_mbox_free(&engine.init.nonce);
versal_mbox_free(&engine.init.key);
memset(&engine.init, 0, sizeof(engine.init));
STAILQ_FOREACH_SAFE(node, &engine.replay_list, link, next) {
STAILQ_REMOVE(&engine.replay_list, node,
versal_node, link);
if (node->is_aad) {
free(node->aad.mem.buf);
versal_mbox_free(&node->aad.mem);
} else {
free(node->payload.dst.buf);
free(node->payload.src.buf);
free(node->payload.input_cmd.buf);
versal_mbox_free(&node->payload.dst);
versal_mbox_free(&node->payload.src);
versal_mbox_free(&node->payload.input_cmd);
}
free(node);
}
Expand Down