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Systolic arrays much?
🥵
Systolic arrays much?
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pmozil/README.md 
👋 Hi! I'm Petro Mozil, a student at UCU.

I'm currenly learning SystemVerilog, FPGA and compiler theory, at least trying to :(.

I'm moderately good at Zig, C/C++, Haskell, Rust and Python.

Also, async CPUs rock

Pinned

  1. paraflop paraflop Public

    A simple raytracer implementing basic ReSTIR

    C++ 4

  2. cfu_playground_custom_boards cfu_playground_custom_boards Public

    Forked from google/CFU-Playground

    A fork of the CFU playground repo with a workflow for a custom board - it is used to add ram to the CFU

    Verilog

  3. monistode/ISA_accum monistode/ISA_accum Public

    SystemVerilog

  4. zot zot Public

    A basic DFA-based regex written in zig

    Zig 2

  5. dotfiles dotfiles Public

    Dotfiles for any GNU (and maybe non-GNU) system

    Shell 8

  6. blendage blendage Public

    Blendage - a Wayland compositor

    C 2