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cpu,arch: Add IsInvalid flag to Unknown insts #1071

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@hnpl hnpl commented Apr 25, 2024

The IsInvalid flag indicates that the static instruction is not part of the executing ISA and not part of m5's pseudo-instructions. This flag provides a way to recognize an illegal instruction at the decode stage.

@giactra giactra self-requested a review April 25, 2024 08:23
@ivanaamit ivanaamit added arch General gem5 architecture-specific components cpu General gem5 CPU code (e.g., `BaseCPU`) labels May 14, 2024
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Hi, this makes sense to me. Is there a reason why Arm hasn't been included?

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hnpl commented Jun 4, 2024

Hi Giacomo, I haven't figured out how to update the flag for Unknown/Unknown64 instructions in the Arm ISA yet.
If you don't mind, can you suggest a way to change the IsInvalid flag for the instructions?

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giactra commented Jun 7, 2024

Hi Giacomo, I haven't figured out how to update the flag for Unknown/Unknown64 instructions in the Arm ISA yet. If you don't mind, can you suggest a way to change the IsInvalid flag for the instructions?

Hi @hnpl , you just need to add the flag after the unknownCode for Unknown64 (and do something similar for the 32bit version)

hnpl added 2 commits June 9, 2024 06:33
The IsInvalid flag indicates that the static instruction is not part
of the executing ISA and not part of m5's pseudo-instructions. This
flag provides a way to recognize an illegal instruction at the decode
stage.

Change-Id: I2779c6edcd8c5e6a77ea11cad3ff73bacb79d800
Signed-off-by: Hoa Nguyen <hn@hnpl.org>
Change-Id: I096138a157c4e2063c5f4f4324c21c1463dddb65
Signed-off-by: Hoa Nguyen <hn@hnpl.org>
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3 participants