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Drexel VANDAL

Drexel University's VLSI and Architecture Lab

Philadelphia, PA
http://vlsi.ece.drexel.edu
michael.d.lui@drexel.edu

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prism prism Public

Modular, flexible, cross-platform workload profiling and characterization

C++ 13 6
Sigil-Trace-Visualizer Sigil-Trace-Visualizer Public

Dot-based visualization tool for Sigil Traces

Python 1
SynchroTrace-gem5 SynchroTrace-gem5 Public

Synchronization-aware Trace Replay for gem5 simulation speed up

C++ 5 2

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Showing 10 of 10 repositories

prism Public
Modular, flexible, cross-platform workload profiling and characterization

C++ 13 BSD-3-Clause 6 6 (1 issue needs help) 0 Updated Mar 1, 2021
SynchroTrace-gem5 Public
Synchronization-aware Trace Replay for gem5 simulation speed up

C++ 5 BSD-3-Clause 2 1 0 Updated Jul 12, 2019
stgen_1to2 Public
Convert text formatted SynchroTraces from v1 format to v2

C++ 1 0 0 0 Updated Jun 22, 2019
Sigil-Trace-Visualizer Public
Dot-based visualization tool for Sigil Traces

Python 1 BSD-2-Clause 0 1 (1 issue needs help) 0 Updated Jul 11, 2018
valgrind Public
Fork of valgrind for supporting conditional branching in VEX IR

C 0 GPL-2.0 0 0 0 Updated Jun 19, 2018
Sigil Public archive Forked from snilakan/Sigil
[DEPRECATED] Sigil captures computation, communication, and synchronizaton within an exectuable binary as traces.

C 0 5 0 0 Updated Jun 14, 2018
valgrind-sigil2 Public archive
[DEPRECATED] Valgrind Instrumentation Framework - modified for Sigil2

C 0 GPL-2.0 0 0 0 Updated Jun 14, 2018
sigil2 Public archive
[DEPRECATED] Modular Application Tracing Framework

C++ 2 BSD-3-Clause 1 0 0 Updated Jun 14, 2018
dynamorio-sigil2 Public archive Forked from DynamoRIO/dynamorio
[DEPRECATED] Dynamic Instrumentation Tool Platform - modified for Sigil2

C 0 561 0 0 Updated May 31, 2017
SynchroTrace Public archive
[DEPRECATED] Synchronization-Aware Traces and Replay for Design Space Exploration

C++ 1 BSD-3-Clause 4 0 0 Updated Feb 9, 2017

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