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This place provide different SRAM cells netlist to be simulated with HSpice tool in sub-20nm FinFET technologies.

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Near-Threshold-SRAM

These file are the files that have been used for the "A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20 nm FinFET technologies" journal paper.

One of the important piece of code that has been uploaded here is the code for calculating the Hold Static Noise Margin (HSNM) and Read Static Noise margin (RSNM).

The other important piece of code is the code for process variation.

Please cite the paper and this github code repository when you use these codes from here.

Thank you.

Please contact us for collaboration or if you have any questions. Hassan Afzali-Kusha (Email: afzaliku@usc.edu), Mohammad Ansari(Email: ansarimohammad2005@yahoo.com), Behzad Ebrahimi(Email: Behzad Ebrahimi bebrahimi2007@gmail.com)

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This place provide different SRAM cells netlist to be simulated with HSpice tool in sub-20nm FinFET technologies.

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