AES encryption and decryption algorithms implemented in Verilog programming language

This project is done in Vivado in Verilog with hardware implementation and the project is optimized Schoolbook multiplier which is much faster than the traditional ones

Deep Learning based Finite State Machine implementation of a Smart Lock System

Verilog structural model HDL program

This is part of EC383 - Mini Project in VLSI Design.

Repo for my Verilog Projects

verilog code

a verilog Snake Game

Contains vim dotfiles configured for verilog, C++ & some stuff for VLSI

An FPGA design for simulating biological neurons

digital systems

This repo is for my IEEE ASU Student Branch Digital IC Design workshop, an introduction to digital design using Verilog, this is a documentation of my tasks.

Risc-V 32i processor written in the Verilog HDL

Router 1 x3 is a Basic level Design of Wireless Fidelity Router Model • The top level consists of 4 blocks-3 FIFO{First In First Out Register) , 1 Register, 1 Synchroniser and 1 Control Block (FSM-Finite State Machine) • RTL and Testbench are coded in verilog and the waveforms are generated using Modelsim software. • The Synthesis was performed u

Verilog implementations of different simple tasks

👾 My studies with Verilog and notions of digital systems.

Verilog Projects : 1) Vending Machine 2)Traffic Light Controller

This is a project I did during my Digital Design Course

This is the game "Brick Breaker" designed in verilog for an FPGA.