Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

[HW] HWModule (et. al.) should have separate symbol and name to be emitted #7023

Open
teqdruid opened this issue May 10, 2024 · 2 comments
Open

[HW] HWModule (et. al.) should have separate symbol and name to be emitted #7023

teqdruid opened this issue May 10, 2024 · 2 comments
Labels
HW Involving the `hw` dialect

Comments

@teqdruid
Copy link
Contributor

Given all the talk about the mistake of conflating symbols with names, I had assumed that this had been fixed in the HW dialect. Is there some reason it hasn't? Or is this just waiting on someone to do it?
@teqdruid teqdruid added the HW Involving the `hw` dialect label May 10, 2024
@teqdruid
Copy link
Contributor Author

@darthscsi @seldridge Since you two were the two recommending to Morten and myself about names vs. symbols.

@teqdruid
Copy link
Contributor Author

Discussed this at the ODM. HWModuleOp should have a separate module name which gets unique'd instead of using the symbol by default.

Separately, everything should be using the hw.verilogName attribute to tell ExportVerilog "I know what I'm doing, use this name"

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Assignees
No one assigned
Labels
HW Involving the `hw` dialect
Projects
None yet
Milestone
No milestone
Development

No branches or pull requests
1 participant
@teqdruid