Export to KiCad/eeschema [work in progress]

[mplucinski]

Hi,

Getting no answer to my comment in #464, I decided to open a separate issue to add some visibility to my efforts.

As mentioned there, I'm currently working on a function to export circuits from Digital to KiCad. It's still in early development, but it's already possible to export some circuits and open them in eeschema. Sneak preview of how the "Adder8bit" example looks like when exported:

The current state of my efforts are available in a branch of my fork: https://github.com/mplucinski/Digital/tree/kicad

Compared to what I described in a comment in #464, I introduced some improvements:

• wires are supported now, they're placed exactly like they are in the .dig file. 1-bit wires are exported as regular wires, while multi-bit wires should become buses (broken atm). Splitters are implemented as dynamically-generated sheets, so that KiCad (and human inspector) understands how the connections are going.

• all elements are in the same places as they are in the .dig file. They're represented by hierarchical sheets and have the same sizes. This way, there's no need to move elements or wires. The final layout doesn't look great in KiCad, as it's rather dense, but works (perhaps reducing the font size would help a bit)

• top-level .dig file becomes a second-level hierarchical sheet. Inputs and outputs of the circuit become hierarchical pins in the top-level kicad sheet. This way, user can add any additional wiring (power, connectors...) in the top level sheet without interferring with anything coming from the .dig file. The top-level file is exported only once (during the first export), so it's safe to modify the .dig and do an export again - only the lower-level sheets will be overwritten.

The thing is still far away to be PR-worthy. The most important missing points are:

• junctions are not yet implemented

• in some places, wires are placed where buses should be

• elements' references are bad/missing/repeating. Right now they must be always regenerated with eeschema's "annotate schematics..." tool

• exported schemas still generate some ERC errors

• still most of the Digital built-in elements are missing

• (very) dirty code & hardcoded paths

• only CLI, no GUI at all yet

• only one representation for each element type available (very simple, resistor-transistor ^^ discrete components); user cannot yet easily change the representation nor configure it

• no support for multi-unit kicad elements yet (necessary for chips like 74xx)

• no tests yet