These two commits add agnostic capability for both tail/mask policies, for vector memory and arithmetic instructions respectively. The common policy for instructions is to act as undisturbed if one is (i.e. tail or mask), or write all 1s if none.

For those instructions in which multiple micro instructions are instantiated to write to the same register (VlStride and VlIndex for memory, and VectorGather, VectorSlideUp and VectorSlideDown for arithmetic), a (new) micro instruction named VPinVdCpyVsMicroInst has been used to pin the destination register so that there's no need to copy the partial results between them. This idea is similar to what's on ARM's SVE code. This micro also implements the tail/mask policy for this cases.

Finally, it's worth noting that while now using an agnostic policy for both tail/mask should remove all dependencies with old destination registers, there's an exception with VectorSlideUp. The vslideup_{vx,vi} instructions need the elements in the offset to be unchanged. The current implementation overrides the current vta/vma and makes them act as undisturbed, since they require the old destination register anyways. There's a minor issue with this though, as v{,f}slide1up variants do not need this, but since they share the same constructor, will act all the same.

Related issue #997.