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This can cause a false lock. For instance, an 8-PSK signal may lock with an order 4 Costas PLL at a carrier frequency equal to the actual carrier frequency +/- pi/4 radians/symbol.
The carrier frequency should probably be limited to an offset of less than pi/8 radians/symbol.
The text was updated successfully, but these errors were encountered:
Currently, the carrier frequency for the Costas loop is not limited:
https://github.com/BatchDrake/sigutils/blob/master/sigutils/pll.c#L242
This can cause a false lock. For instance, an 8-PSK signal may lock with an order 4 Costas PLL at a carrier frequency equal to the actual carrier frequency +/- pi/4 radians/symbol.
The carrier frequency should probably be limited to an offset of less than pi/8 radians/symbol.
The text was updated successfully, but these errors were encountered: